2024-04-24
Introduction
Summary
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TODO
HW
Exercise*
Next time
Clock
clock skew happens when we put a gate to the clock signal.
how to correct the skew?
In real cases, the state is not flat. ; the signal damps.
In order to correct this, we take the criteria of "over 90%" as top state and "under 10%" as bottom state.
no more clock speed enhancements, due to *
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